DocumentCode
2583328
Title
SIMD extension to VLIW multicluster processors for embedded applications
Author
Barretta, Domenico ; Fornaciari, William ; Sami, Mariagiovanna ; Pau, Danilo
Author_Institution
Dipt. di Elettronica e Informazione, Politecnico di Milano, Italy
fYear
2002
fDate
2002
Firstpage
523
Lastpage
526
Abstract
We propose a retargetable architecture, based on a multicluster VLIW processor that can exploit either instruction level parallelism (ILP) or ILP and data level parallelism (DLP) jointly in a SIMD fashion. Simulation results show that performances may increase significantly when the application is compiled for the proposed architecture.
Keywords
data flow computing; parallel architectures; performance evaluation; ILP; SIMD extension; data level parallelism; dataflow architecture; instruction level parallelism; multicluster VLIW processor; parallel architectures; retargetable architecture; Embedded system; Laboratories; Optimizing compilers; Parallel architectures; Parallel processing; Registers; Scheduling; VLIW; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Computer Design: VLSI in Computers and Processors, 2002. Proceedings. 2002 IEEE International Conference on
ISSN
1063-6404
Print_ISBN
0-7695-1700-5
Type
conf
DOI
10.1109/ICCD.2002.1106823
Filename
1106823
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