• DocumentCode
    2583822
  • Title

    Speed optimized LUT based ‘K’ Dimensional reusable VQ Encoder core

  • Author

    Rasane, Krupa R. ; Kunte, R. Srinivas Rao

  • Author_Institution
    Electron. & Commun. Dept., KLESCET, Belgaum, India
  • fYear
    2010
  • fDate
    7-10 May 2010
  • Firstpage
    173
  • Lastpage
    178
  • Abstract
    This paper presents a review and improvement in the architecture of our earlier work presenting the `k Dimensional 4 codebook encoder´. A new VLSI LUT based “Mean Square distortion error” core is introduced in the VQ Encoder architecture. The paper focuses mainly on the modified technique utilized in our new VQ Encoder architecture which utilizes the repeatability and symmetric property observed in the Mean Square error calculations thereby completely eliminating the multiplication or addition data processing required for the MSE(Mean Square distortion error). This has resulted in improving the processing speed and has incorporated simplicity in the design by introducing an LUT, instead of the exhaustive arithmetic processing. This improved MSE module has been designed, implemented and tested in VHDL and synthesized and simulated. The improved hardware design can be used to easily build a larger VQ system by incorporating multiple such reusable cores. This makes the complete system design more modular with predictable delay and hence more suitable for time multiplexed wireless applications in real time Image Compression applications with processing speed of greater than 30 frames/sec.
  • Keywords
    codecs; data compression; image coding; mean square error methods; exhaustive arithmetic processing; image compression; k dimensional 4 codebook encoder; k dimensional reusable VQ encoder core; mean square distortion error; mean square error calculations; speed optimized LUT; Arithmetic; Data processing; Delay effects; Hardware; Image coding; Mean square error methods; Real time systems; Table lookup; Testing; Very large scale integration; Image compression; Image encoder; LBG Algorithm; VLSI; Vector Quantization;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electronic Computer Technology (ICECT), 2010 International Conference on
  • Conference_Location
    Kuala Lumpur
  • Print_ISBN
    978-1-4244-7404-2
  • Electronic_ISBN
    978-1-4244-7406-6
  • Type

    conf

  • DOI
    10.1109/ICECTECH.2010.5479963
  • Filename
    5479963