DocumentCode
2584118
Title
Reliable digital circuits design using sigma-delta modulated signals
Author
Schüler, Erik ; Carro, Luigi
Author_Institution
Dept. de Engenharia Eletrica, Univ. Fed. do Rio Grande do Sul, Port Alegre, Brazil
fYear
2005
fDate
3-5 Oct. 2005
Firstpage
314
Lastpage
324
Abstract
As the transistor gate length goes straightforward to the sub-micron dimension, the possibilities of occurrence of external interferences in these devices also increase. Moreover, the process variability further degrade this scenario. The direct effect of such external and/or intrinsic interferences is, in many cases, the total mismatch between the desired answer of the system and the achieved answer resulting from single bit flips. This way, new techniques must be studied in order to guarantee the correct operation of these systems. This work presents the use of a totally digital sigma-delta modulator that is used to develop arithmetic operations, which are further used to develop a FIR filter. Simulations results show that, even with the insertion of a large amount of faults, one can still obtain a nonfaulty behavior in the SNR of complex application.
Keywords
FIR filters; digital arithmetic; fault tolerance; integrated circuit design; integrated circuit reliability; logic design; sigma-delta modulation; FIR filters; arithmetic operations; digital circuit design; digital sigma-delta modulator; external interferences; intrinsic interferences; process variability; sigma-delta modulated signals; transistor gate length; Circuit faults; Delta-sigma modulation; Digital circuits; Digital modulation; Electromagnetic transients; Finite impulse response filter; Interference; MOSFETs; Signal design; Single event upset;
fLanguage
English
Publisher
ieee
Conference_Titel
Defect and Fault Tolerance in VLSI Systems, 2005. DFT 2005. 20th IEEE International Symposium on
ISSN
1550-5774
Print_ISBN
0-7695-2464-8
Type
conf
DOI
10.1109/DFTVS.2005.57
Filename
1544530
Link To Document