DocumentCode :
2585120
Title :
A 40-to-76 GHz Balanced Distributed Doubler in 0.13-μm CMOS Technology
Author :
Huang, Bo-Jiun ; Huang, Bo-Jr ; Chen, Chung-Chun ; Lin, Kun-You ; Wang, Huei
Author_Institution :
Dept. of Electr. Eng., Nat. Taiwan Univ., Taipei
fYear :
2008
fDate :
27-28 Oct. 2008
Firstpage :
17
Lastpage :
19
Abstract :
A miniature 40- to 76-GHz monolithic balanced distributed frequency doubler is developed in a commercial 0.13-mum CMOS process. This balanced doubler consists of a reduced-size broadside-coupled Marchand balun and two distributed doublers, and suppresses fundamental signals better than 25 dB. The measured conversion losses are 8-11 dB for the output frequencies from 40 to 76-GHz under 6-dBm input drive, with a low dc power consumption of 12 mW. The chip size is 0.64 times 0.65 mm2. To the best of our knowledge, this doubler achieves the widest bandwidth among all the CMOS doublers reported to date.
Keywords :
CMOS integrated circuits; frequency multipliers; CMOS technology; Marchand balun; conversion losses; frequency 40 GHz to 76 GHz; low dc power consumption; monolithic balanced distributed frequency doubler; size 0.13 mum; Bandwidth; CMOS process; CMOS technology; Energy consumption; Frequency conversion; Frequency measurement; Impedance matching; Loss measurement; Power measurement; Semiconductor device measurement;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Microwave Integrated Circuit Conference, 2008. EuMIC 2008. European
Conference_Location :
Amsterdam
Print_ISBN :
978-2-87487-007-1
Type :
conf
DOI :
10.1109/EMICC.2008.4772217
Filename :
4772217
Link To Document :
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