DocumentCode :
2585443
Title :
Multi-scale energy-based failure modeling of bond pad structures
Author :
van der Sluis, O. ; van Silfhout, R.B.R. ; Engelen, R.A.B. ; van Driel, W.D. ; Zhang, G.Q.
Author_Institution :
Philips Appl. Technol., Eindhoven
fYear :
2007
fDate :
16-18 April 2007
Firstpage :
1
Lastpage :
6
Abstract :
Thermo-mechanical reliability issues have been identified as major bottlenecks in the development of future microelectronic components. This is caused by the following technology and business trends: (1) increasing miniaturisation, (2) introduction of new materials, (3) shorter time-to-market, (4) increasing design complexity and decreasing design margins, (5) shortened development and qualification times, (5) gap between technology and fundamental knowledge development. It is now well established that for future CMOS-technologies (CMOS065 and beyond), low-k dielectric materials will be integrated in the back-end structures [8]. However, bad mechanical integrity as well as weak interfacial adhesion result in major thermo-mechanical reliability issues. Especially the forces resulting from packaging related processes such as dicing, wire bonding, bumping and molding are critical and can easily induce cracking, delamination and chipping of the IC back end structure when no appropriate development is performed. The scope of this paper is on the development of numerical models that are able to predict the failure sensitivity of complex three-dimensional multi-layered structures while taking into account the details at the local scale of the microelectronic components by means of a multi-scale method. The damage sensitivity is calculated by means of an enhanced version of the previously introduced area release energy (ARE) criterion. This enhancement results in an efficient and accurate prediction of the energy release rate (ERR) at a selected bimaterial interface in any location. Moreover, due to the two-scale approach local details of the structure are readily taken into account. In order to evaluate the efficiency and accuracy of the proposed method, several two-dimensional and three-dimensional benchmarks will be simulated. The paper focusses on the enhanced ARE method, including several two- and three-dimensional benchmarks.
Keywords :
CMOS integrated circuits; fracture mechanics; integrated circuit bonding; integrated circuit modelling; integrated circuit reliability; low-k dielectric thin films; multilayers; CMOS technology; CMOS065; area release energy criterion; back-end structure; bimaterial interface; bond pad structure; complex three-dimensional multilayered structure; damage sensitivity; energy release rate; fracture mechanics; low-k dielectric materials; microelectronic components; multiscale energy-based failure modeling; thermomechanical reliability; three-dimensional benchmark; two-dimensional benchmark; Adhesives; Bonding; CMOS technology; Dielectric materials; Integrated circuit packaging; Microelectronics; Qualifications; Thermomechanical processes; Time to market; Wire;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Thermal, Mechanical and Multi-Physics Simulation Experiments in Microelectronics and Micro-Systems, 2007. EuroSime 2007. International Conference on
Conference_Location :
London
Print_ISBN :
1-4244-1105-X
Electronic_ISBN :
1-4244-1106-8
Type :
conf
DOI :
10.1109/ESIME.2007.359955
Filename :
4201152
Link To Document :
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