DocumentCode :
2585657
Title :
Performance Analysis of Balanced and Unbalanced Feed-Forward Equalizer Structures for Multi-Gigabit Applications in 0.18μm CMOS Process
Author :
Kim, H.S. ; Bhatta, D. ; Lee, K.-H. ; Scholz, C. ; Gebara, E. ; Laskar, J.
Author_Institution :
Georgia Electron. Design Center, Georgia Inst. of Technol., Atlanta, GA
fYear :
2008
fDate :
27-28 Oct. 2008
Firstpage :
143
Lastpage :
146
Abstract :
In this paper, a comparative study of two different structures for the Feed Forward Equalizer (FFE) is presented to emphasize the effect of structural differences on the performance of the passive delay line based FFEs with large number of taps. Both FFEs are designed for compensation of Inter Symbol Interference (ISI) in multi-Gb/s data link. The two test structures use the same building blocks but differ in the implementation. Both of them have nine taps with passive delay cells and are designed in 0.18 mum CMOS technology.
Keywords :
CMOS integrated circuits; delay lines; equalisers; feedforward; intersymbol interference; CMOS technology; feed forward equalizer; intersymbol interference; multigigabit data link; passive delay line; size 0.18 mum; Bandwidth; CMOS process; CMOS technology; Decision feedback equalizers; Degradation; Delay lines; Feedforward systems; Intersymbol interference; Performance analysis; Testing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Microwave Integrated Circuit Conference, 2008. EuMIC 2008. European
Conference_Location :
Amsterdam
Print_ISBN :
978-2-87487-007-1
Type :
conf
DOI :
10.1109/EMICC.2008.4772249
Filename :
4772249
Link To Document :
بازگشت