Title :
A 20GS/s 8-Bit Current Steering DAC in 0.25μm SiGe BiCMOS Technology
Author :
Halder, Samiran ; Gustat, Hans ; Scheytt, Christoph ; Thiede, Andreas
Author_Institution :
Dept. of Circuit Design, IHP Microelectron., Frankfurt
Abstract :
This paper presents the design of an 8-bit 20 GS/s DAC. The DAC is implemented with a modified current steering architecture where unlike the conventional binary weighted architecture a R-2R ladder DAC architecture is used as the LSB sub-DAC. In simulation the 8-bit DAC shows 7.83 ENOB for 9 GHz of input sinusoidal at 20 GHz of sampling rate with the power dissipation of 2.5 W. The measurement results of the 4-bit LSB sub-DAC show that the sub-DAC can work up to 30 GHz with a power dissipation of 455 mW.
Keywords :
BiCMOS integrated circuits; Ge-Si alloys; digital-analogue conversion; semiconductor materials; 8-bit current steering architecture; BiCMOS technology; DAC; R-2R ladder DAC architecture; SiGe; binary weighted architecture; frequency 20 GHz; frequency 30 GHz; frequency 9 GHz; power 2.5 W; power 455 mW; power dissipation; BiCMOS integrated circuits; Delay; Germanium silicon alloys; Impedance; Integrated circuit technology; Microwave technology; Sampling methods; Silicon germanium; Switches; Timing;
Conference_Titel :
Microwave Integrated Circuit Conference, 2008. EuMIC 2008. European
Conference_Location :
Amsterdam
Print_ISBN :
978-2-87487-007-1
DOI :
10.1109/EMICC.2008.4772250
