Spiking dynamic neural fields architectures on FPGA

Neuromorphic engineering is a very active field aiming to design dedicated hardware architectures to simulate the tremendous power and complexity of the brain at real time speed. Many high scaled generic projects are a success but we focus on decentralized embeddable implementations of dynamic neural fields (DNFs): a popular building blocks approach to simulate high level cognitive behaviors. The main difficulty of this approach is its mandatory all-to-all connectivity within the neural network which does not fit hardware constraints. Here we show that it is possible to decentralize the DNF computations using a cellular grid of spiking neurons with stochastic transmissions mapped onto a field programmable gate array (FPGA). The advantages of these randomly spiking dynamic neural fields (RSDNFs) are a dedicated 1-bit probabilistic XY broadcast routing network with inherent synaptic weights computations that provides hardware compatibility thanks to the 4-neighbor cellular connectivity. Moreover, this implementation strategy exhibits fault tolerance properties but it is more area greedy and time consuming than a standard implementation that broadcasts neuron addresses and coordinates using the address event representation (AER) on a centralized bus.