A new predistorter model based on power amplifier physical knowledge

This paper presents a new power amplifier (PA) linearizer model whose topology has support on the physical recursive behavior of the general PA electronic circuit. The resulting model presents a topology that, in its essence, is non recursive, which makes it suited for an easy implementation on digital hardware devices (such as FPGAs and DSPs). Validation tests were performed on a 900 MHz PA excited with WCDMA-3GPP signals and comparison with other linearizer models demonstrated its excellence. Due to its support on the PA physical behavior, the proposed predistorter model has the potential to be an adequate linearizer for a wide range of PA device technologies and excitation signals.