Title :
Implemention of 128-Point Fast Fourier Transform Processor for UWB Systems
Author :
Cho, Sang-in ; Kang, Kyu-Min ; Choi, Sang-Sung
Author_Institution :
Wireless Connectivity Res. Team, ETRI, Daejeon
Abstract :
In this paper, we present a 4-parallel fast Fourier transform (FFT) processor for a multi-band orthogonal frequency division multiplexing (MB-OFDM) ultra wideband (UWB) system. The proposed FFT processor utilizes radix-24 structure so as to significantly enhance the hardware complexity by reducing the numbers of multipliers and adders. The hardware efficient 4-parellel 128-point FFT processor employing the decimation-in-frequency (DIF) and the single-path delay feedback (SDF) algorithms can support throughput rates of up to 1 Gsample/s. The proposed FFT processor is implemented and tested by adopting the 0.18 mum CMOS technology with a supply voltage of 1.8 V.
Keywords :
CMOS integrated circuits; OFDM modulation; adders; fast Fourier transforms; microprocessor chips; multiplying circuits; ultra wideband communication; CMOS technology; adders; decimation-in-frequency; fast Fourier transform processor; multi-band orthogonal frequency division multiplexing; multipliers; single-path delay feedback algorithms; size 0.18 mum; ultra wideband system; voltage 1.8 V; CMOS process; CMOS technology; Delay; Fast Fourier transforms; Feedback; Hardware; OFDM; Testing; Throughput; Ultra wideband technology;
Conference_Titel :
Wireless Communications and Mobile Computing Conference, 2008. IWCMC '08. International
Conference_Location :
Crete Island
Print_ISBN :
978-1-4244-2201-2
Electronic_ISBN :
978-1-4244-2202-9
DOI :
10.1109/IWCMC.2008.37
