DocumentCode
2587060
Title
Low-temperature and Pressureless Sintering Technology for High-performance and High-temperature Interconnection of Semiconductor Devices
Author
Lu, Guo-Quan ; Calata, Jesus N. ; Lei, Guangyin ; Chen, Xu
Author_Institution
Dept. of Mater. Sci. & Eng., Virginia Tech., Blacksburg, VA
fYear
2007
fDate
16-18 April 2007
Firstpage
1
Lastpage
5
Abstract
We present an interconnect technology based on low-temperature and pressureless sintering of a nanoscale metal paste to achieve high-performance and high-temperature packaging of semiconductor devices. The nanoscale metal paste, consisting of nanoparticles of silver mixed in an organic binder/solvent vehicle, can be sintered at temperatures close to 275degC. Measurements on electrical and thermal properties of the sintered die interconnect gave it at least five times better than the soldered or epoxied attachment. Die-shear tests of the sintered joints showed a bonding strength of about 25 MPa. The sintered joints exhibited excellent reliability in aging and temperature-cycling tests. Since silver melts at 961degC, the sintered interconnect can be used for wide band gap semiconductor devices (SiC or GaN), which are operable over 300degC where none of the existing solder alloys or epoxies can be used. In summary, the low- temperature sintering of nanoscale metal paste is shown to be a reliable, lead-free interconnect solution for high-temperature and high-performance packaging needs.
Keywords
ageing; integrated circuit bonding; integrated circuit interconnections; integrated circuit packaging; integrated circuit reliability; integrated circuit testing; mechanical testing; microassembling; nanoparticles; organic compounds; semiconductor device packaging; semiconductor device reliability; silver; sintering; wide band gap semiconductors; Ag; aging; die interconnect; die-shear test; electrical properties; high-temperature interconnection; high-temperature packaging; joint bonding strength; low-temperature sintering; nanoscale metal paste; organic binder; pressureless sintering; reliability; semiconductor device interconnect technology; silver nanoparticles; temperature-cycling test; thermal properties; wide band gap semiconductor device; Electric variables measurement; Nanoparticles; Nanoscale devices; Semiconductor device packaging; Semiconductor devices; Silver; Solvents; Temperature; Testing; Vehicles;
fLanguage
English
Publisher
ieee
Conference_Titel
Thermal, Mechanical and Multi-Physics Simulation Experiments in Microelectronics and Micro-Systems, 2007. EuroSime 2007. International Conference on
Conference_Location
London
Print_ISBN
1-4244-1105-X
Electronic_ISBN
1-4244-1106-8
Type
conf
DOI
10.1109/ESIME.2007.360066
Filename
4201233
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