DocumentCode
2587096
Title
The Concept of Computing on Chip (CoC) for Electric Power System Application
Author
Huang, Qi ; Chen, Xiaoping ; Wang, Bingfeng ; Cai, Ronghai ; Qin, Kaiyu
Author_Institution
Sch. of Autom. Eng., Univ. of Electron. Sci. & Technol. of China, Chengdu
fYear
2006
fDate
13-17 Sept. 2006
Firstpage
433
Lastpage
437
Abstract
This paper proposes an infrastructure in which analog-digital mixed VLSI circuit is used to perform transient stability analysis in electric power system. Through proper configuration a VLSI circuit can be used to simulate the dynamics in power system in a real-time or even super real-time manner. With currently available VLSI circuit technology large and complex SOC (system-on-chip) can be fabricated on a single chip. With the power/ill digital processing capability, a computing-on-chip (CoC) can provide powerful programmability to perform high-speed analog simulation of power system with variable topologies, parameters and operation conditions. In this paper, the system structure and the VLSI implementation of power system stability model is proposed. And the PSpice simulation results are presented, and the results are compared with that of typical digital power system simulation program. It is verified that power system CoC can perform real-time or super real-time stability analysis with acceptable accuracy; hence it is a proposing technology
Keywords
VLSI; mixed analogue-digital integrated circuits; power system simulation; power system transient stability; system-on-chip; PSpice simulation; VLSI circuit technology; analog-digital mixed power system transient stability analysis; computing on chip; digital power system simulation program; digital processing; electric power system application; high-speed analog simulation; system-on-chip; Circuits; Computational modeling; Power system analysis computing; Power system dynamics; Power system modeling; Power system simulation; Power system stability; Real time systems; System-on-a-chip; Very large scale integration; CoC; Power System; SOC; Transient Simulation; VLSI;
fLanguage
English
Publisher
ieee
Conference_Titel
Parallel Computing in Electrical Engineering, 2006. PAR ELEC 2006. International Symposium on
Conference_Location
Bialystok
Print_ISBN
0-7695-2554-7
Type
conf
DOI
10.1109/PARELEC.2006.79
Filename
1698700
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