Frequency Locked Loop for grid-connected VSI synchronization and power analysis

Future power systems will include the massive utilization of distributed generation mainly based on renewable energy resources. These renewable energy resources can be interconnected to the utility grid by means of power electronics converters working as Voltage Source Inverters (VSIs) which must be synchronized with the utility voltage. Synchronization methods are mandatory to make possible a correct power control and to keep an acceptable power quality. The Field Programmable Gate Array (FPGA) has been introduced in recent years as a promising target device for embedded applications especially when the parallel implementation of multiple algorithms is needed. This paper presents a new structure of the Adaptive Linear Neuron (ADALINE) with Frequency Locked Loop (ADALINE-FLL), its FPGA implementation and its experimental evaluation. The proposition has been implemented in a Xilinx FPGA device and experimentally validated using low power VSI connected to a low voltage utility.