Thermally robust high quality HfN/HfO/sub 2/ gate stack for advanced CMOS devices

Author

Yu, H.Y. ; Kang, J.F. ; Chen, J.D. ; Ren, C. ; Hou, Y.T. ; Whang, S.J. ; Li, M.-F. ; Chan, D.S.H. ; Bera, K.L. ; Tung, C.H. ; Du, A. ; Kwong, D.-L.

Author_Institution

Dept. of Electr. & Comput. Eng., Nat. Univ. of Singapore, Singapore

fYear

2003

fDate

8-10 Dec. 2003

Abstract

We report for the first time a thermally stable and high quality HfN/HfO/sub 2/ gate stack for advanced CMOS applications. Due to the superior oxygen diffusion barrier of HfN as well as the thermal stability of the HfN/HfO/sub 2/ interface, the EOT of the HfN/HfO/sub 2/ gate stack has been successfully scaled down to less than 10/spl Aring/ with excellent leakage, boron penetration immunity, and long-term reliability, even after 1000/spl deg/C RTA treatment for 20 s, without using surface nitridation prior to HfO/sub 2/ deposition. The mobility is improved significantly for devices without surface nitridation. Negligible change in both EOT and the work function of the HfN/HfO/sub 2/ gate stack are observed after 1000/spl deg/C RTA.

Keywords

CMOS integrated circuits; dielectric thin films; diffusion barriers; hafnium compounds; rapid thermal annealing; thermal stability; 10 /spl Aring/; 1000 degC; 20 s; CMOS; EOT; HfN-HfO/sub 2/; RTA treatment; boron penetration immunity; high quality HfN/HfO/sub 2/ gate stack; leakage; long-term reliability; mobility improvement; oxygen diffusion barrier; rapid thermal annealing; stack work function; thermally robust gate stack; thermally stable gate stack; Dielectric substrates; Fabrication; Hafnium oxide; Robustness; Scalability; Surface cleaning; Surface treatment; Temperature; Thermal stability; Tin;

fLanguage

English

Publisher

ieee

Conference_Titel

Electron Devices Meeting, 2003. IEDM '03 Technical Digest. IEEE International

Conference_Location

Washington, DC, USA

Print_ISBN

0-7803-7872-5

Type

conf

DOI

10.1109/IEDM.2003.1269175

Filename

1269175