A 19.1-dBm Fully-Integrated 24 GHz Power Amplifier Using 0.18-μm CMOS Technology

Author

Jing-Lin Kuo ; Tsai, Zuo-Min ; Wang, Huei

Author_Institution

Dept. of Electr. Eng. & Grad. Inst. of Commun. Eng., Nat. Taiwan Univ., Taipei

fYear

2008

fDate

27-28 Oct. 2008

Firstpage

558

Lastpage

561

Abstract

A 24 GHz, 19.1 dBm fully-integrated power amplifiers (PA) was designed and fabricated in the 0.18-mum deep n-well (DNW) CMOS technology. This power amplifier is a 2-stage design using cascode RF NMOS configuration and has a maximum measured output power of 19.1 dBm, an OP_1dB of 13.3 dBm, a power added efficiency (PAE) of 15.6%, and a linear gain of 18.8 dB when V _DD and DNW are both biased at 3.6 V. The chip size is only 0.56 times 0.58 mm². To the author´s knowledge, this PA demonstrates the highest output power of +19.1 dBm among the reported PAs above 15 G.Hz in CMOS processes.

Keywords

CMOS integrated circuits; MOS integrated circuits; microwave power amplifiers; 2-stage design; CMOS technology; cascode RF NMOS configuration; chip size; frequency 24 GHz; fully-integrated power amplifier; power added efficiency; size 0.18 mum; voltage 3.6 V; CMOS technology; Gain measurement; MOS devices; Power amplifiers; Power generation; Power measurement; Radio frequency; Radiofrequency amplifiers; Semiconductor device measurement; Size measurement;

fLanguage

English

Publisher

ieee

Conference_Titel

Microwave Integrated Circuit Conference, 2008. EuMIC 2008. European

Conference_Location

Amsterdam

Print_ISBN

978-2-87487-007-1

Type

conf

DOI

10.1109/EMICC.2008.4772353

Filename

4772353