DC to 70 GHz 90 nm 3D CMOS SPDT using elevated CPW and CPS series stubs

This paper proposes a new approach for realizing a compact SPDT switch incorporating compact, elevated coplanar waveguide (ECPW) series stubs in conjunction with CPS series stubs in order to extend the operating frequency. The design technique has been successfully demonstrated using a multi-layer 90nm CMOS process. The proposed SPDT switch takes advantage of the multi-level metallization processes offered in CMOS technology. The intrinsic area of the fabricated 3D SPDT switch is significantly reduced. Simulated and experimental results are presented in support of the novel compact switch. The switch achieves a measured insertion loss of less than 3.8 dB and a measured isolation of better than 18 dB from DC to 70 GHz.