DocumentCode :
258838
Title :
Simplifying HOG arithmetic for speedy hardware realization
Author :
Jian-Feng Wang ; Chiu-Sing Choy ; Tak-Lon Chao ; Ko-Chun Kit ; Kong-Pang Pun ; Wan-Li Ouyang ; Xiao-Gang Wang
Author_Institution :
Dept. of Electron. Eng., CUHK, Snatin, China
fYear :
2014
fDate :
17-20 Nov. 2014
Firstpage :
61
Lastpage :
64
Abstract :
While Histograms of Gradients (HOG) has been proven as an excellent feature set for human detection, its intricate computation does not readily lend itself to be realized into high performance and economical hardware. This paper proposes several methods to simplify complicated computations of HOG, so that HOG feature extraction can be speeded up, which is essential in real-time applications, and become more appealing. Considering that a successful detection does not depend on the precision of individual elements in the descriptor, our intention is to exploit this to simplify the HOG arithmetic. In other words, with no discernible impact on detection, our aim is to accelerate the computations of HOG by reducing the accuracy of the arithmetic with a controlled upper bound. The proposed methods have been utilized on widely known test dataset, ETHZ, and the results show that no detection performance is suffered.
Keywords :
feature extraction; gradient methods; ETHZ; HOG arithmetic; HOG feature extraction; controlled upper bound; feature set; histograms of gradients; human detection; real-time applications; speedy hardware realization; Acceleration; Accuracy; Feature extraction; Hardware; Histograms; Indexing; Real-time systems; Arithmetic Simplification; HOG; Hardware;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems (APCCAS), 2014 IEEE Asia Pacific Conference on
Conference_Location :
Ishigaki
Type :
conf
DOI :
10.1109/APCCAS.2014.7032719
Filename :
7032719
Link To Document :
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