Few electron memories: finding the compromise between performance, variability and manufacturability at the nano-scale

The key challenges for memories that operate at the nanoscale, and are compatible with mainstream nano-scale CMOS, are in achieving the performance characteristics that are useful at massive integration and in the reproducibility necessary for manufacturing. Use of single or few electrons, by utilizing the reduced dimensions - smaller number of states and larger charging energies - while appealing as a concept, needs to address the increased variance, smaller signal, and numerous other consequences of reduced collective phenomena. Several key ideas of recent times, from the use of nanocrystals to defects and decoupling of storage from the read process, provide paths where power, speed, technology compatibility, and variability is addressed. This paper discusses several of these approaches and their attributes, focusing on finding the design compromises for usability and manufacturability.