Taking SOI substrates and low-k dielectrics into high-volume microprocessor production

Author

Greenlaw, D. ; Burbach, G. ; Feudel, T. ; Feustel, F. ; Frohberg, K. ; Graetsch, F. ; Grasshoff, G. ; Hartig, C. ; Heller, T. ; Hempel, K. ; Horstmann, M. ; Huebler, P. ; Kirsch, R. ; Kruegel, S. ; Langer, E. ; Pawlowitsch, A. ; Ruelke, H. ; Schuehrer, H.

Author_Institution

Adv. Micro Devices, AMD Saxony LLC, Dresden, Germany

fYear

2003

fDate

8-10 Dec. 2003

Abstract

SOI and low-k technologies are rapidly approaching production maturity. This paper highlights several challenges found when moving them from development to high-volume manufacturing. In overcoming these challenges in wafer processing and transistor development, we have achieved yield learning and performance enhancement rates equivalent to or better than conventional technologies.

Keywords

dielectric thin films; integrated circuit manufacture; microprocessor chips; silicon-on-insulator; SOI substrates; high-volume manufacturing; high-volume microprocessor production; low-k dielectrics; performance enhancement rates; production maturity; transistor development; wafer processing; yield learning; Delay; Dielectric substrates; Etching; Isolation technology; Microprocessors; Plasma applications; Production; Pulp manufacturing; Semiconductor films; Transistors;

fLanguage

English

Publisher

ieee

Conference_Titel

Electron Devices Meeting, 2003. IEDM '03 Technical Digest. IEEE International

Conference_Location

Washington, DC, USA

Print_ISBN

0-7803-7872-5

Type

conf

DOI

10.1109/IEDM.2003.1269278

Filename

1269278