Fully silicided NiSi and germanided NiGe dual gates on SiO/sub 2//Si and Al/sub 2/O/sub 3//Ge-on-insulator MOSFETs

Author

Huang, C.H. ; Yu, D.S. ; Chin, A. ; Wu, C.H. ; Chen, W.J. ; Chunxiang Zhu ; Li, M.F. ; Byung Jin Cho ; Dim-Lee Kwong

Author_Institution

Dept. of Electron. Eng., Nat. Chiao Tung Univ., Hsinchu, Taiwan

fYear

2003

fDate

8-10 Dec. 2003

Abstract

We demonstrate for the first time fully silicided NiSi (4.55 eV) and germanided NiGe (5.2 eV) dual gates on 1.9 nm-SiO/sub 2//Si and Al/sub 2/O/sub 3//Ge-on-insulator (GOI) MOSFETs (EOT= 1.7 nm). In additional to the comparable gate current and time-to-breakdown with Al gate C-MOSFETs, the fully NiSi and NiGe gates on SiO/sub 2//Si show mobility close to universal mobility while on Al/sub 2/O/sub 3//GOI show /spl sim/2.0/spl times/ higher peak electron and hole mobility than Al on Al/sub 2/O/sub 3//Si, with the special advantage of NiSi and NiGe being compatible to current VLSI process lines.

Keywords

MOSFET; alumina; electron mobility; elemental semiconductors; germanium; hole mobility; nickel compounds; silicon; silicon compounds; silicon-on-insulator; 1.7 nm; 1.9 nm; 4.55 eV; 5.2 eV; GOI; MOSFET; NiGe-Al/sub 2/O/sub 3/-Ge; NiGe-SiO/sub 2/-Si; NiSi-Al/sub 2/O/sub 3/-Ge; NiSi-SiO/sub 2/-Si; SOI; VLSI process; fully germanided dual gates; fully silicided dual gates; gate current; germanium-on-insulator; hole mobility; peak electron mobility; silicon-on-insulator; time-to-breakdown; universal mobility; Aluminum oxide; Artificial intelligence; Capacitance; Crystallization; Degradation; Dielectric devices; MOSFETs; Plasma temperature; Very large scale integration; Wafer bonding;

fLanguage

English

Publisher

ieee

Conference_Titel

Electron Devices Meeting, 2003. IEDM '03 Technical Digest. IEEE International

Conference_Location

Washington, DC, USA

Print_ISBN

0-7803-7872-5

Type

conf

DOI

10.1109/IEDM.2003.1269289

Filename

1269289