DocumentCode
2589280
Title
Design exploration in HW/SW co-design of real-time object-oriented embedded systems: the scheduler object
Author
Silva, Elias Teodoro ; Wehrmeister, Marco A. ; Becker, Leandro Buss ; Wagner, Flávio Rech ; Pereira, Carlos Eduardo
Author_Institution
Comput. Sci. Inst., Rio Grande do Sul Fed. Univ., Brazil
fYear
2005
fDate
2-4 Feb. 2005
Firstpage
378
Lastpage
385
Abstract
This paper discusses a design flow for multithread object-oriented real-time applications, running on top of an embedded, platform-based, customizable Java processor, which is prototyped using affordable FPGAs. The proposed approach enforces design space exploration activities, taking into account aspects like temporal behavior, memory footprint, and power/energy consumption. A case study containing a task scheduler implementation as both software and hardware modules is presented. While both implementations are compatible with the developed program from an interface point of view, they lead to different timing and footprint requirements. Their evaluation in terms of memory occupation and number of FPGA logic cells is presented.
Keywords
Java; embedded systems; field programmable gate arrays; hardware-software codesign; multi-threading; object-oriented programming; processor scheduling; FPGA logic cells; Java processor; energy consumption; hardware modules; hardware-software codesign; memory footprint; power consumption; real-time object-oriented embedded systems; scheduler object; software modules; task scheduler; Application software; Embedded system; Energy consumption; Field programmable gate arrays; Java; Processor scheduling; Prototypes; Real time systems; Software prototyping; Space exploration;
fLanguage
English
Publisher
ieee
Conference_Titel
Object-Oriented Real-Time Dependable Systems, 2005. WORDS 2005. 10th IEEE International Workshop on
ISSN
1530-1443
Print_ISBN
0-7695-2347-1
Type
conf
DOI
10.1109/WORDS.2005.25
Filename
1544814
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