Title :
Challenges in embedded memory design and test
Author :
Marinissen, Erik Jan ; Prince, Betty ; Keltel-Schulz, D. ; Zorian, Yervant
Author_Institution :
Philips Res. Labs., Eindhoven, Netherlands
Abstract :
Both the number of embedded memories, as well as the total embedded memory content in our chips is growing steadily. Time for chip designers, EDA makers, and test engineers to update their knowledge on memories. This hot topic paper provides an embedded tutorial on embedded memories, in terms of what is new and coming versus what is old and vanishing, and what are the associated design, test, and repair challenges related to using embedded memories.
Keywords :
integrated circuit design; integrated circuit testing; integrated memory circuits; system-on-chip; EDA; SoC design; embedded memory design; embedded memory test; memory repair; CMOS logic circuits; CMOS process; CMOS technology; EPROM; Logic design; Logic testing; Nonvolatile memory; Paper technology; Random access memory; Voltage;
Conference_Titel :
Design, Automation and Test in Europe, 2005. Proceedings
Print_ISBN :
0-7695-2288-2
DOI :
10.1109/DATE.2005.92
