The impact of substrate surface potential on the performance of RF power LDMOSFETs on high-resistivity SOI

Author

Scholvin, J. ; Fiorenza, J.G. ; del Alamo, J.A.

Author_Institution

MIT, Cambridge, MA, USA

fYear

2003

fDate

8-10 Dec. 2003

Abstract

This paper presents an in-depth study of the effects of substrate surface potential on the RF power performance of LDMOSFETs on high-resistivity SOI. Substrate surface inversion and accumulation substantially degrade the RF power performance of these devices by providing an RF shunt between source and drain through the substrate surface. The degradation is most prominent under conditions of low gain, high frequency, and high power compression. The potential of HR-SOI for RF applications can only be realized by preventing the appearance of a continuous conducting path at the substrate surface. Under appropriate conditions, we demonstrate an RF LDMOSFET on HR-SOI with a peak PAE of 40% at 7.2 GHz.

Keywords

microwave power transistors; power MOSFET; semiconductor device measurement; semiconductor device models; silicon-on-insulator; surface potential; 40 percent; 7.2 GHz; HR-SOI; PAE; RF power LDMOSFET; RF power performance degradation; equivalent circuit model; high-resistivity SOI; power compression; source/drain RF shunt; substrate surface accumulation; substrate surface conducting path; substrate surface inversion; substrate surface potential; CMOS technology; Degradation; Fingers; Inductors; Performance gain; Power MOSFET; Power transmission lines; Radio frequency; Shunt (electrical); System-on-a-chip;

fLanguage

English

Publisher

ieee

Conference_Titel

Electron Devices Meeting, 2003. IEDM '03 Technical Digest. IEEE International

Conference_Location

Washington, DC, USA

Print_ISBN

0-7803-7872-5

Type

conf

DOI

10.1109/IEDM.2003.1269299

Filename

1269299