• DocumentCode
    2589586
  • Title

    Suppression Of Bit-line-induced Disturbance In SOI DRAM/SRAM Cells By Bipolar Embedded Source Structure (BESS)

  • Author

    Horiuchi, M. ; Sakata, T. ; Kimura, S.

  • Author_Institution
    Central Research Laboratory, Hitachi Ltd., Kokubunji, Tokyo 185, Japan
  • fYear
    1997
  • fDate
    10-12 June 1997
  • Firstpage
    157
  • Lastpage
    158
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    VLSI Technology, 1997. Digest of Technical Papers., 1997 Symposium on
  • Print_ISBN
    4-930813-75-1
  • Type

    conf

  • DOI
    10.1109/VLSIT.1997.623746
  • Filename
    623746
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2589586