Title :
A germanium NMOSFET process integrating metal gate and improved hi-/spl kappa/ dielectrics
Author :
Chi On Chui ; Hyoungsub Kim ; McIntyre, P.C. ; Saraswat, K.C.
Author_Institution :
Dept. of Electr. Eng., Stanford Univ., CA, USA
Abstract :
A simple and novel self-aligned gate-last MOS process integrating metal gates and high-k dielectrics on Ge has been demonstrated. Improved surface passivation for excellent gate dielectric and field isolation, and n-type dopant incorporation with high surface concentration and shallow junctions has been developed. Conventional VLSI type Ge n-MOSFETs have been fabricated.
Keywords :
MOSFET; dielectric thin films; doping profiles; elemental semiconductors; germanium; passivation; Ge-HfO/sub 2/; Ge-ZrO/sub 2/; VLSI type n-MOSFET; dopant concentration; gate dielectric isolation; gate field isolation; germanium NMOSFET process; hi-k dielectrics; metal gate; n-type dopant incorporation; self-aligned gate-last MOS process; shallow junctions; surface passivation; Capacitance-voltage characteristics; Dielectric substrates; Germanium; High-K gate dielectrics; Intrusion detection; MOSFET circuits; Passivation; Temperature; Threshold voltage; Very large scale integration;
Conference_Titel :
Electron Devices Meeting, 2003. IEDM '03 Technical Digest. IEEE International
Conference_Location :
Washington, DC, USA
Print_ISBN :
0-7803-7872-5
DOI :
10.1109/IEDM.2003.1269316
