DocumentCode
2589780
Title
S&H circuits for fast AD converters
Author
Pichler, H. ; Pavuza, F. ; Sommer, T.
Author_Institution
Inst. fur Allgemeine Elektrotech., Tech. Univ. Wien, Austria
fYear
1994
fDate
5-8 Sep 1994
Firstpage
603
Lastpage
609
Abstract
The paper describes the basic theoretical properties of the exponential-hold circuit, compared to the zero order hold and based on a previously published paper (Pichler and Skritek, 1980), which gave an extensive survey of the more common zero-order hold, a comparison of the relevant features of these circuits-now concentrating on the new calculations concerning the exponential hold-is given. With respect to the realization in semiconductor technologies, the limitations of the different S&H structures will be demonstrated
Keywords
analogue-digital conversion; convertors; sample and hold circuits; AD converters; exponential-hold circuit; sample and hold circuits; Circuit synthesis; Circuit testing; Delay; Power dissipation; Power generation economics; Power system economics; Signal representations; TV; Transfer functions; Video signal processing;
fLanguage
English
Publisher
ieee
Conference_Titel
EUROMICRO 94. System Architecture and Integration. Proceedings of the 20th EUROMICRO Conference.
Conference_Location
Liverpool
Print_ISBN
0-8186-6430-4
Type
conf
DOI
10.1109/EURMIC.1994.390352
Filename
390352
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