Author :
Yang, M. ; Ieong, M. ; Shi, L. ; Chan, K. ; Chan, V. ; Chou, A. ; Gusev, E. ; Jenkins, K. ; Boyd, D. ; Ninomiya, Y. ; Pendleton, D. ; Surpris, Y. ; Heenan, D. ; Ott, J. ; Guarini, K. ; D´Emic, C. ; Cobb, M. ; Mooney, P. ; To, B. ; Rovedo, N. ; Benedict, J
Author_Institution :
IBM Semicond. Res. & Dev. Center, IBM T. J. Watson Res. Center, Yorktown Heights, NY, USA
Abstract :
A novel structure and technology has been developed for high performance CMOS using hybrid silicon substrates with different crystal orientations (namely pFET on [110]-oriented surface and nFET on (100) surface) through wafer bonding and selective epitaxy. CMOS devices with physical gate oxide thickness of 1.2 nm have been demonstrated, with substantial enhancement of pFET drive current at L/sub poly//spl les/80 nm.
Keywords :
CMOS integrated circuits; MOSFET; crystal orientation; epitaxial growth; substrates; wafer bonding; 1.2 nm; 80 nm; crystal orientations; drive current enhancement; gate oxide thickness; high performance CMOS; hybrid silicon substrates; nFET; pFET; selective epitaxy; silicon(100); silicon[110]; wafer bonding; CMOS process; CMOS technology; Epitaxial growth; Fabrication; Hydrogen; Lithography; Semiconductor epitaxial layers; Silicon; Substrates; Wafer bonding;
