A 6 V embedded 90 nm silicon nanocrystal nonvolatile memory

Author

Muralidhar, R. ; Steimle, R.F. ; Sadd, M. ; Rao, R. ; Swift, C.T. ; Prinz, E.J. ; Yater, J. ; Grieve, L. ; Harber, K. ; Hradsky, B. ; Straub, S. ; Acred, B. ; Paulson, W. ; Chen, W. ; Parker, L. ; Anderson, S.G.H. ; Rossow, M. ; Merchant, T. ; Paransky, M

Author_Institution

Digital DNA Labs., Motorola Inc., Austin, TX, USA

fYear

2003

fDate

8-10 Dec. 2003

Abstract

The first functional 6 V, 4 Mb silicon nanocrystal based nonvolatile memory arrays using conventional 90 nm and 0.25 /spl mu/m process technologies have been produced. The technology can be programmed and erased using conventional techniques in floating gate memories and can substantially reduce the cost of embedded flash at the 90 nm node and beyond.

Keywords

PLD programming; elemental semiconductors; flash memories; integrated circuit measurement; integrated memory circuits; microprogramming; nanoelectronics; nanostructured materials; random-access storage; silicon; 0.25 micron; 4 Mbit; 6 V; 90 nm; Si; embedded flash memories; embedded silicon nanocrystal nonvolatile memory; erase techniques; floating gate memories; process technologies; programming techniques; silicon nanocrystal based nonvolatile memory arrays; CMOS process; CMOS technology; Dielectrics; Human computer interaction; Nanocrystals; Nonvolatile memory; SONOS devices; Silicon; Tunneling; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Electron Devices Meeting, 2003. IEDM '03 Technical Digest. IEEE International

Conference_Location

Washington, DC, USA

Print_ISBN

0-7803-7872-5

Type

conf

DOI

10.1109/IEDM.2003.1269353

Filename

1269353