• DocumentCode
    2591065
  • Title

    Room-temperature operation of highly functional single-electron transistor logic based on quantum mechanical effect in ultra-small silicon dot

  • Author

    Saitoh, M. ; Hiramoto, T.

  • Author_Institution
    Inst. of Ind. Sci., Univ. of Tokyo, Japan
  • fYear
    2003
  • fDate
    8-10 Dec. 2003
  • Abstract
    This paper describes the room-temperature (RT) demonstration of a newly proposed highly-functional single-electron transistor (SET) logic based on the quantum mechanical effect. We fabricate single-hole transistors (SHTs) in the form of extremely constricted channel MOSFETs and obtain large Coulomb blockade (CB) oscillations with a peak-to-valley current ratio (PVCR) of 10/sup 2/ at RT. In the fabricated single-dot SHTs, clear negative differential conductance (NDC) with a PVCR of 11.8 (highest ever reported) is also observed at RT because of the large quantum level spacing (/spl Delta/E) in the ultrasmall dot. By combining CB and NDC, XOR operation is successfully demonstrated as a current output in just one SHT.
  • Keywords
    Coulomb blockade; MOSFET; elemental semiconductors; quantum gates; semiconductor quantum dots; silicon; single electron transistors; 293 to 298 K; Coulomb blockade oscillations; NDC; SET room-temperature operation; SHT; Si; XOR operation; constricted channel MOSFET; negative differential conductance; peak-to-valley current ratio; quantum level spacing; quantum mechanical effect; single-electron transistor logic; single-hole transistors; ultra-small silicon dot; Etching; Fabrication; Logic; MOSFETs; Quantum dots; Quantum mechanics; Silicon; Single electron transistors; US Department of Transportation; Wire;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electron Devices Meeting, 2003. IEDM '03 Technical Digest. IEEE International
  • Conference_Location
    Washington, DC, USA
  • Print_ISBN
    0-7803-7872-5
  • Type

    conf

  • DOI
    10.1109/IEDM.2003.1269390
  • Filename
    1269390