DocumentCode
2591563
Title
A Constraint Network Based Approach to Memory Layout Optimization
Author
Chen, G. ; Kandemir, M. ; Karakoy, M.
Author_Institution
The Pennsylvania State University
fYear
2005
fDate
7-11 March 2005
Firstpage
1156
Lastpage
1161
Abstract
While loop restructuring based code optimization for array intensive applications has been successful in the past, it has several problems such as the requirement of checking dependences (legality issues) and transformation of all of the array references within the loop body indiscriminately (while some of the references can benefit from the transformation, others may not). As a result, data transformations, i.e., transformations that modify memory layout of array data instead of loop structure have been proposed. One of the problems associated with data transformations is the difficulty of selecting a memory layout for an array that is acceptable to the entire program (not just to a single loop). In this paper, we formulate the problem of determining the memory layouts of arrays as a constraint network, and explore several methods of solution in a systematic way. Our experiments provide strong support in favor of employing constraint processing, and point out future research directions.
Keywords
Application software; Automatic testing; Computer networks; Computer science; Constraint optimization; Design automation; Educational institutions; Engineering profession; Proposals; Robustness;
fLanguage
English
Publisher
ieee
Conference_Titel
Design, Automation and Test in Europe, 2005. Proceedings
ISSN
1530-1591
Print_ISBN
0-7695-2288-2
Type
conf
DOI
10.1109/DATE.2005.6
Filename
1395750
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