Title :
Reliability issues for high-k gate dielectrics
Author_Institution :
Taiwan Semicond. Manuf. Corp., Hsinchu, Taiwan
Abstract :
High-k gate dielectric materials are likely to be implemented in Si CMOS processes in the near future. Reliability characteristics that closely match, or exceed, those of SiO/sub 2/ will be one of the primary goals of future development work. In this paper we review the status of reliability studies of high-k gate dielectrics. High-k materials show novel reliability phenomena related to the asymmetric gate band structure and the presence of fixed charge. The reliability of high-k structures is influenced both by the interfacial layer as well as the high-k layer. Attainment of reliability goals will require elimination of charging effects, which dominate transistor degradation.
Keywords :
MIS devices; dielectric thin films; electric breakdown; semiconductor device reliability; NMOS; PMOS; Si CMOS processes; asymmetric gate band structure; charging effects; fixed charge; high-k gate dielectric reliability; high-k materials; hot carrier aging; interfacial layer; time dependent dielectric breakdown; transistor degradation; CMOS process; CMOS technology; Circuits; Degradation; Dielectric materials; Dielectric substrates; Electron traps; Gate leakage; High K dielectric materials; High-K gate dielectrics;
Conference_Titel :
Electron Devices Meeting, 2003. IEDM '03 Technical Digest. IEEE International
Conference_Location :
Washington, DC, USA
Print_ISBN :
0-7803-7872-5
DOI :
10.1109/IEDM.2003.1269429
