A 0.7-V 10-bit 3μW analog-to-digital converter for implantable biomedical applications

For implantable biosensor applications which require a low-cost signal processing unit that features ultra-low power and low-voltage capability as well, this paper proposes a solution by merging switched-opamp technique and foreground digital calibration into a single 10-bit ADC. Utilization of the switched-opamp technique allows for low supply operation down to 0.7 V. The insufficient gain associated with low supply voltage analog devices is manipulated by the employment of foreground calibration. Ultra-low power consumption is achieved through adequate circuit structure selection and weak-inversion transistor biasing. The ADC employs the cyclic/algorithmic architecture which uses only two opamps and two comparators. Simulation results with CMOS 0.13 mum process model demonstrate that the signal to noise and distortion ratio (SNDR) at 10-KHz clock rate is 57 dB when 0.5 % capacitor mismatch is considered. The power consumption of the whole ADC is 3 muW with 0.7 V supply.