Analysis on decoupling capacitor placement associated with power and return plane bounce

Decoupling capacitors minimize both power and return plane bounce developed in power distribution networks when digital components transition logic states. State changes causes significant current spikes in the power and image rails at every edge time and are sometimes called “ground bounce” or “shoot-through” potentials. If there is insufficient energy storage for both the power and return pins, plane bounce will occur. Which plane bounces depends on system and printed circuit board design and layout, particularly in regard to the location of the signal via escape anti-pads compared to the position of the decoupling capacitors. If plane bounce exceeds voltage tolerance margins, functional operation is not ensured resulting in signal integrity problems as well as development of common-mode electromagnetic interference (EMI). We investigate the magnitude of plane bounce at different locations with multiple components switching simultaneously, both with and without decoupling capacitors.