• DocumentCode
    2593339
  • Title

    Using VHDL for Link to Synthesis Tools

  • Author

    Belhadj, Mohammed

  • Author_Institution
    IRISA
  • fYear
    1994
  • fDate
    30 Jun-1 Jul 1994
  • Keywords
    Computer aided engineering; Delay; Design automation; Hardware; High level synthesis; Joining processes; Signal design; Signal generators; Signal processing; Signal synthesis;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Test Workshop, 1994. ATW '94. The Third Annual Atlantic
  • Type

    conf

  • DOI
    10.1109/ATW.1994.747844
  • Filename
    747844
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2593339