• DocumentCode
    2593386
  • Title

    High Level Synthesis Of Globally Asynchronous Locally Synchronous Circuits

  • Author

    Wolinski, Krzysztof ; Belhadj, Mohammed

  • Author_Institution
    IRISA
  • fYear
    1994
  • fDate
    30 Jun-1 Jul 1994
  • Keywords
    Circuit synthesis; Clocks; Delay; Design automation; High level synthesis; Kernel; Metastasis; Robustness; Signal synthesis; Very large scale integration;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Test Workshop, 1994. ATW '94. The Third Annual Atlantic
  • Type

    conf

  • DOI
    10.1109/ATW.1994.747847
  • Filename
    747847