DocumentCode :
2593437
Title :
Common reusable verification environment for BCA and RTL models
Author :
Falconeri, Giuseppe ; Naifer, Walid ; Romdhane, Nizar
fYear :
2005
fDate :
7-11 March 2005
Firstpage :
272
Abstract :
This paper deals with a common verification methodology and environment for SystemC BCA and RTL models. The aim is to save effort by avoiding the same work done twice by different people and to reuse the same environment for the two design views. Applying this methodology the verification task starts as soon as the functional specification is signed off and it runs in parallel to the models and design development. The verification environment is modeled with the aid of dedicated verification languages and it is applied to both the models. The test suite is exactly the same and thus it is possible to verify the alignment between the two models. In fact the final step is to check the cycle-by-cycle match of the interface behavior. A regression tool and a bus analyzer have been developed to help the verification and the alignment process. The former is used to automate the testbench generation and to run the two test suites. The latter is used to verify the alignment between the two models comparing the waveforms obtained in each run. The quality metrics used to validate the flow are full functional coverage and full alignment at each IP port.
Keywords :
C language; automatic test pattern generation; formal verification; hardware description languages; industrial property; system-on-chip; BCA; IP port; RTL models; SoC; SystemC; alignment process; bus analyzer; common reusable verification environment; cycle-by-cycle match; dedicated verification languages; flow validation; full functional coverage; interface behavior; quality metrics; regression tool; test suites; testbench generation automation; Automatic testing; Bandwidth; Circuit simulation; Circuit testing; Design automation; Energy consumption; Read-write memory; Silicon; System-on-a-chip; Time to market;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design, Automation and Test in Europe, 2005. Proceedings
ISSN :
1530-1591
Print_ISBN :
0-7695-2288-2
Type :
conf
DOI :
10.1109/DATE.2005.96
Filename :
1395833
Link To Document :
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