On the design and verification methodology of the look-aside interface

In this paper, we present a technique to design and verify the look-aside (LA-1) interface standard used in network processors. Our design flow includes several refinements starting from an informal UML specification until getting to an RTL modeled in Verilog. We integrate the verification of the LA-interface in the design flow by considering two intermediate levels: (1) abstract state machines (ASM); and (2) SystemC. The first one serves the verification by model checking of a set of PSL properties, while the second includes a set of assertions to be verified by simulation. To evaluate the performance of our approach, we used the rule-base model checker to verify the same properties; and the OVL library to verify the same assertions.