DocumentCode
2594269
Title
Self-Calibrating Equalizer for Optimal Jitter Performance Using On-chip Eye Monitoring
Author
Chandrasekaran, Srinivasaraman ; Desai, Kunal ; Sendhil, Arul ; Ng, William
fYear
2011
fDate
2-7 Jan. 2011
Firstpage
6
Lastpage
11
Abstract
Magnitude of equalization applied by a receiver equalization circuit varies across silicon process and environmental conditions. We propose a novel method to auto calibrate a programmable receiver equalization circuit to a target gain equalization value without the use of any external test equipment or channel. This method is built upon on-chip eye monitoring and internal loop back capabilities, which are used to measure the gain equalization value. By executing this on-chip gain equalization measurement for various equalizer settings, the setting which produces equalization that is closest to the target value can be determined. This has been implemented in 45nm CMOS for a PCI Express 2.0 transceiver hardware running at 5Gbps. Lab results with test silicon demonstrate the on-chip eye height measurement capabilities.
Keywords
CMOS integrated circuits; calibration; equalisers; height measurement; intersymbol interference; jitter; programmable circuits; transceivers; CMOS technology; PCI Express 2.0 transceiver; external test equipment; eye height measurement; gain equalization value; internal loop back; intersymbol interference; on-chip eye monitoring; optimal jitter performance; programmable receiver equalization circuit; self-calibrating equalizer; size 45 nm; Calibration; Equalizers; Gain measurement; Jitter; Receivers; System-on-a-chip; Temperature measurement; Equalization Calibration; ISI reduction; eye height measurement; gain equalization; in-situ eye; ratio of eye heights;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Design (VLSI Design), 2011 24th International Conference on
Conference_Location
Chennai
ISSN
1063-9667
Print_ISBN
978-1-61284-327-8
Electronic_ISBN
1063-9667
Type
conf
DOI
10.1109/VLSID.2011.38
Filename
5718769
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