A SOI EEPROM Based Configuration Cell with Simple Scrubbing Detection

Author

Haque, Kashfia ; Beckett, Paul

Author_Institution

Sch. of Electr. & Comput. Eng., RMIT Univ., Melbourne, VIC, Australia

fYear

2011

fDate

2-7 Jan. 2011

Firstpage

24

Lastpage

29

Abstract

We present a Silicon-on-Insulator based circuit for use as configuration storage in a radiation hard reconfigurable system. A non-volatile storage cell, manufacturable in a standar single polysilicon SOI CMOS process with no special layers, is combined with a Schmitt sense amplifier such that the overall block exhibits two unique characteristics that enhance its resistance to radiation induced upsets. Firstly, it is impossible for a radiation-induced event to permanently flip the configuration state. Secondly, a partial de-programming resulting in a reduction in the magnitude of the storage cell voltage causes a large change in static current that can be very easily detected using a conventional sense amplifier. A memory correction (scrubbing) system that exploits this behavior is briefly described.

Keywords

CMOS analogue integrated circuits; EPROM; amplifiers; elemental semiconductors; radiation hardening (electronics); random-access storage; silicon-on-insulator; SOI EEPROM; Schmitt sense amplifier; Si; configuration cell; configuration storage; conventional sense amplifier; memory correction system; nonvolatile storage cell; partial deprogramming; polysilicon SOI CMOS process; radiation hard reconfigurable system; radiation induced upsets; silicon-on-insulator; simple scrubbing detection; storage cell voltage; EPROM; Field programmable gate arrays; Integrated circuit modeling; Inverters; Logic gates; Random access memory; Silicon on insulator technology;

fLanguage

English

Publisher

ieee

Conference_Titel

VLSI Design (VLSI Design), 2011 24th International Conference on

Conference_Location

Chennai

ISSN

1063-9667

Print_ISBN

978-1-61284-327-8

Electronic_ISBN

1063-9667

Type

conf

DOI

10.1109/VLSID.2011.50

Filename

5718772