Title :
Performance analysis for hardware/software co-synthesis
Author :
Bennour, Imed E. ; Langevin, Michel ; Aboulhamid, El M.
Author_Institution :
Dept. d´´Inf. et de Recherche Oper., Montreal Univ., Que., Canada
Abstract :
This paper presents a method for estimating the extreme case bounds (upper-bound and lower-bound) on the running time of a source program on a target hardware architecture. The source program may be any block of code containing data processing and control statements. The target architecture is specified by a set of functional units, a set of storage units and an interconnection network
Keywords :
logic CAD; logic partitioning; software engineering; co-synthesis; hardware/software co-synthesis; interconnection network; lower-bound; performance analysis; storage units; target architecture; target hardware architecture; upper-bound; Analytical models; Computational modeling; Computer architecture; Costs; Data processing; Hardware; Multiprocessor interconnection networks; Performance analysis; Process control; Software performance;
Conference_Titel :
Electrical and Computer Engineering, 1996. Canadian Conference on
Conference_Location :
Calgary, Alta.
Print_ISBN :
0-7803-3143-5
DOI :
10.1109/CCECE.1996.548062
