DocumentCode :
2594868
Title :
Topology characteristics analysis and performance comparison for optimal design of high efficiency PFC circuit for telecom
Author :
Kim, Yun-Sung ; Byoung-Kuk Lee ; Lee, Julian W.
Author_Institution :
Sch. of Inf. & Commun. Eng., SungKyunKwan Univ., Suwon, South Korea
fYear :
2011
fDate :
9-13 Oct. 2011
Firstpage :
1
Lastpage :
7
Abstract :
This paper is selecting typical PFC topology that can be application design of high-capability power of high efficiency, high power factor correction (PFC) performances, and review its operating characteristics, and analyze the actual performance differences to manufacture 2kwatt grade product under the same conditions. The first topology is average current mode control (ACM) PFC that the performance is excellent and applications examples are various in conventional PFC circuit methods. The second topology is related to Interleaved PFC of dual boost way that has the advantages of current ripple performance improvement and current stress reduction properties. Third and fourth topology is back to back bridgeless (BTBBL) PFC and semi-bridgeless (SBL), and the object of topologies is to improve loss of bridge diode. PSIM simulation was used for comparison of topology and prototype was designed with power density standard of more 1.35kW/dm3 under 1U size low-profile conditions. To minimize the performance comparison errors, design conditions such as board space, heat-sink and PCB pattern synchronize to the maximum. It should be note that topology efficiency and power factor performance difference was identified objectively through comparing tests.
Keywords :
bridge circuits; network synthesis; network topology; power factor correction; power semiconductor diodes; telecommunication power supplies; PCB pattern synchronization; PFC circuit method; PFC topology; PSIM simulation; average current mode control; back to back bridgeless PFC; bridge diode; current ripple performance improvement; current stress reduction property; dual boost way; grade product; high efficiency PFC circuit; high power factor correction performance; interleaved PFC; low-profile condition; optimal design; performance comparison error; power factor performance difference; semibridgeless PFC; topology characteristics analysis; Current transformers; FETs; Inductors; Oil insulation; Pulse width modulation; Average current mode; Backt to back; Bridgeless; Iterleaved; PFC; Power factor corrention; Semi-bridgeless;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Telecommunications Energy Conference (INTELEC), 2011 IEEE 33rd International
Conference_Location :
Amsterdam
ISSN :
2158-5210
Print_ISBN :
978-1-4577-1249-4
Electronic_ISBN :
2158-5210
Type :
conf
DOI :
10.1109/INTLEC.2011.6099764
Filename :
6099764
Link To Document :
بازگشت