DocumentCode :
2595112
Title :
A Robust and Reconfigurable Multi-mode Power Gating Architecture
Author :
Zhang, Z. ; Kavousianos, X. ; Chakrabarty, K. ; Tsiatouhas, Y.
Author_Institution :
Dept. of Electr. & Comput. Eng., Duke Univ., Durham, NC, USA
fYear :
2011
fDate :
2-7 Jan. 2011
Firstpage :
280
Lastpage :
285
Abstract :
Multi-threshold CMOS is a very effective technique for reducing standby leakage power during long periods of inactivity. Recently, a power-gating scheme was presented to support multiple power-off modes and reduce the leakage power during short periods of inactivity. However, this scheme suffers from high sensitivity to process variations, which impedes manufacturability and also limits its applicability to at most two intermediate power-off modes. We propose a new power-gating technique that is tolerant to process variations and scalable to more than two intermediate power-off modes. In addition, the proposed design requires minimum design effort and offers greater power reduction and smaller area cost than the previous method. Analysis and extensive simulation results demonstrate the effectiveness of the proposed design.
Keywords :
CMOS integrated circuits; integrated circuit design; multithreshold CMOS; process variations; reconfigurable multimode power gating architecture; standby leakage power; Generators; Leakage current; Logic gates; Mathematical model; Power demand; Threshold voltage; Transistors;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Design (VLSI Design), 2011 24th International Conference on
Conference_Location :
Chennai
ISSN :
1063-9667
Print_ISBN :
978-1-61284-327-8
Electronic_ISBN :
1063-9667
Type :
conf
DOI :
10.1109/VLSID.2011.29
Filename :
5718815
Link To Document :
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