A 24-GHz low-noise amplifier co-designed with ESD protection using junction varactors in 65-nm RF CMOS

Summary form only given, as follows. A 24-GHz LNA, utilizing junction varactors as ESD protection, is first demonstrated by a 65-nm CMOS technology. The ESD protection capability of the junction varactors with multi-finger topology is characterized by TLP measurements. Under a power consumption of 7 mW, the proposed LNA achieves a 1.4-A TLP failure level, corresponding to an over 2-kV ESD protection. The LNA presents a lowest noise figure of 2.8 dB at 23.5 GHz and a peak power gain of 14.3 dB at 24 GHz, respectively.