Crosstalk Analysis of an Inductively and Capacitively Coupled Interconnect Driven by a CMOS Gate

This paper deals with crosstalk analysis of a CMOS gate driven capacitively and inductively coupled interconnect. Alpha Power Law model of MOS - transistor is used to represent a transistor in CMOS- driver. This is combined with a transmission line based coupled RLC-model of interconnect to develop a composite driver interconnect load (DIL) model for analytical purpose. On this basis a transient analysis of crosstalk noise is carried out. Comparison of the analytical results with SPICE extracted results shows that the error involved is nominal.