DocumentCode :
2596997
Title :
Ultra fine-pitch wafer level packaging with reworkable composite nano-interconnects
Author :
Aggarwal, Ankur O. ; Raj, P. Markondeya ; Sacks, Michael D. ; Tay, Andrew A O ; Tummala, Rao R.
Author_Institution :
Microsystems Packaging Res. Center, Georgia Inst. of Technol., Atlanta, Germany
fYear :
2004
fDate :
8-10 Dec. 2004
Firstpage :
132
Lastpage :
137
Abstract :
The decrease in feature sizes of micro-electronic devices has underlined the need for higher number of I/O´s in order to increase its functionality. This has spurred a great interest in developing electronic packages with fine and ultra fine pitches (20-100 microns). Most of the compliant interconnects that are currently being developed have inductance and resistance higher than desirable. This work presents a novel low-temperature fabrication process that combines polymer structures with electroless copper plating to create low stress MEMS structures for extremely fine pitch wafer level packages. Finite element analysis of these structures shows tremendous reduction in the stresses at the interfaces and superior reliability as IC-package nano interconnects. Low CTE polyimide structures with ultra-low stress, high toughness and strength were fabricated using plasma etching. This dry etching process was tuned to yield a wall angle above 80 degrees. The etching process also leads to roughened sidewalls for selective electroless copper plating on the sidewalls of polymer structures. Metal-coated polymer structures from MEMS fabrication techniques can provide low-cost high-performance solutions for wafer-level-packaging. This work also describes a material solution synthesis route to develop reworkable nano-dimensional interfaces for IC-package bonding. Reworkability is addressed by a thin (200 nm) interface of lead-free high-strength solders using selective electroless plating. Lead-free alloy films were deposited from aqueous plating solutions consisting of suitable metal salts and reducing agents at 45°C. The lead-free solder composition was controlled by altering the plating bath formulation and was characterized using SEM, XRD and XPS. Solder film formed from the above approach was demonstrated to bond the metal-coated polymer interconnects with the copper pads on the substrate.
Keywords :
X-ray diffraction; X-ray photoelectron spectra; alloys; copper; electroplating; fine-pitch technology; finite element analysis; integrated circuit interconnections; integrated circuit packaging; micromechanical devices; nanotechnology; polymers; scanning electron microscopy; solders; sputter etching; wafer bonding; 200 nm; 45 C; Cu; IC-package bonding; IC-package nano interconnects; dry etching process; extremely fine pitch wafer level packages; finite element analysis; lead-free alloy films; lead-free high-strength solders; lead-free solder composition; low CTE polyimide structures; low stress MEMS structures; low-temperature fabrication process; metal-coated polymer interconnects; metal-coated polymer structures; plasma etching; reworkable composite nano-interconnects; reworkable nano-dimensional interface; selective electroless copper plating; stress reduction; ultra fine-pitch wafer level packaging; wafer-level-packaging; Copper; Environmentally friendly manufacturing techniques; Etching; Fabrication; Lead; Micromechanical devices; Packaging; Polymers; Stress; Wafer scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronics Packaging Technology Conference, 2004. EPTC 2004. Proceedings of 6th
Print_ISBN :
0-7803-8821-6
Type :
conf
DOI :
10.1109/EPTC.2004.1396591
Filename :
1396591
Link To Document :
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