DocumentCode
2597735
Title
Off-line photolithographic parameter extraction using electrical test structures
Author
Cork, C.M.
Author_Institution
INMOS Ltd., Newport, UK
fYear
1989
fDate
13-14 March 1989
Firstpage
7
Lastpage
14
Abstract
A description is given of how and when electrical test techniques should be used for measuring photolithographic parameters. Results are given on stepper matching, reticle overlay, process latitude, and lens characteristics using electrical linewidth and misalignment structures. Electrical test structures show great flexibility and accuracy down to dimensions on the order of the wavelength of light used in comparable optical systems. Their main drawback is the need to etch and resist strip the wafer before probing. This leads to an unacceptably long turnaround time and has restricted their use to offline applications such as machine or material acceptance and process characterization.
Keywords
integrated circuit testing; photolithography; spatial variables measurement; electrical linewidth; electrical test structures; lens characteristics; machine acceptance; material acceptance; misalignment structures; offline measurement; photolithographic parameter extraction; process characterization; process latitude; reticle overlay; stepper matching; wafer probing; Circuits; Electric variables measurement; Etching; Lenses; Lithography; Optical sensors; Parameter extraction; Pattern matching; Resists; Testing;
fLanguage
English
Publisher
ieee
Conference_Titel
Microelectronic Test Structures, 1989. ICMTS 1989. Proceedings of the 1989 International Conference on
Print_ISBN
0-87942-714-0
Type
conf
DOI
10.1109/ICMTS.1989.39272
Filename
39272
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