DocumentCode :
2597767
Title :
A floating gate method for MOS transistor gate capacitance and Leff measurements and its implementation in a parametric test
Author :
Kazerounian, R. ; Singh, Ashutosh ; Eltan, B.
Author_Institution :
WaferScale Integration Inc., Fremont, CA, USA
fYear :
1989
fDate :
13-14 March 1989
Firstpage :
23
Lastpage :
27
Abstract :
A method for the measurement of the effective channel length and gate capacitances of metal-oxide semiconductor (MOS) transistors is introduced. This method translates capacitance measurement into a simple threshold voltage measurement and is very accurate in the determination of effective channel lengths of short channel DDD and LDD devices. This technique is implemented in a parametric tester for routine process monitoring.
Keywords :
capacitance measurement; insulated gate field effect transistors; length measurement; semiconductor device testing; DDD devices; LDD devices; MOS transistor; capacitance measurement; effective channel length; floating gate method; gate capacitances; parametric test; process monitoring; threshold voltage measurement; CMOS process; Capacitance measurement; Capacitors; Condition monitoring; Length measurement; MOSFETs; Testing; Threshold voltage; Voltage control; Voltage measurement;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Microelectronic Test Structures, 1989. ICMTS 1989. Proceedings of the 1989 International Conference on
Print_ISBN :
0-87942-714-0
Type :
conf
DOI :
10.1109/ICMTS.1989.39275
Filename :
39275
Link To Document :
بازگشت