DocumentCode :
2597837
Title :
A Multi-page Cell Architecture For High-speed Programming Multi-level NAND Flash Memories
Author :
Takeuchi, K. ; Tanaka, T. ; Tanzawa, T.
Author_Institution :
Microelectronics Engineering krborato~, Toshiba Corporation, STE Building, 1000-1, Kasam-cho, Sakae-ku, Yokohama 247, Japan
fYear :
1997
fDate :
12-14 June 1997
Firstpage :
67
Lastpage :
68
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Circuits, 1997. Digest of Technical Papers., 1997 Symposium on
Print_ISBN :
4-930813-76-X
Type :
conf
DOI :
10.1109/VLSIC.1997.623810
Filename :
623810
Link To Document :
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