DocumentCode
2597927
Title
Subtleties of SPICE MOSFET parameter extraction
Author
Bendix, Peter
Author_Institution
Semicond. Optimization & Simulation Inc., Redwood City, CA, USA
fYear
1989
fDate
13-14 March 1989
Firstpage
65
Lastpage
68
Abstract
Circumvention of problems in both DC and AC MOSFET SPICE parameter measurement and extraction is discussed. The goals of this study are to point out pitfalls in extracting accurate and self-consistent SPICE MOS model parameters and, where possible, provide procedures for circumventing the difficulties. To this end, the author provides a fully functional method for extracting DC model parameters and and methods for obtaining the junction and overlap capacitance parameters; appropriate test structures and measurement techniques as well as some of the more subtle aspects of skew model generation are also covered. Test chip layout and least-squares fitting methods are discussed. Emphasis is placed on accuracy and self-consistency.
Keywords
capacitance measurement; electronic engineering computing; insulated gate field effect transistors; semiconductor device models; semiconductor device testing; spatial variables measurement; AC model parameters; DC model parameters; MOSFET parameter extraction; SPICE; accuracy; effective channel length; functional method; junction capacitance; least-squares fitting; overlap capacitance; self-consistency; skew model generation; test chip layout; test structures; Circuit simulation; Curve fitting; Degradation; Intrusion detection; Least squares methods; MOSFET circuits; Parameter extraction; SPICE; Semiconductor device modeling; Testing;
fLanguage
English
Publisher
ieee
Conference_Titel
Microelectronic Test Structures, 1989. ICMTS 1989. Proceedings of the 1989 International Conference on
Print_ISBN
0-87942-714-0
Type
conf
DOI
10.1109/ICMTS.1989.39283
Filename
39283
Link To Document