Title :
Computer-aided redesign of VLSI circuits for hot-carrier reliability
Author :
Li, Pai-Chi ; Hajj, Ibrahim N.
Author_Institution :
ECE Dept., Illinois Univ., Urbana, IL, USA
Abstract :
In this paper a computer-aided design system for CMOS VLSI circuit hot-carrier reliability estimation and redesign is presented. The system first simulates circuits to determine the critical transistors that are most susceptible to hot-carrier effects (HCE); it then estimates the impact of HCE on circuit performance and employs a combination of design modification strategies to eliminate HCE degradation on the performance. The advantages and disadvantages of these alternative designs are also compared
Keywords :
CMOS integrated circuits; VLSI; circuit CAD; hot carriers; reliability; CMOS VLSI; circuit hot-carrier reliability estimation; circuit performance; computer aided redesign; computer-aided design system; design modification; hot-carrier effects; hot-carrier reliability; Circuit simulation; Contracts; Degradation; Delay; Hot carriers; Interface states; MOSFET circuits; Statistics; Timing; Very large scale integration;
Conference_Titel :
Computer Design: VLSI in Computers and Processors, 1993. ICCD '93. Proceedings., 1993 IEEE International Conference on
Conference_Location :
Cambridge, MA
Print_ISBN :
0-8186-4230-0
DOI :
10.1109/ICCD.1993.393320
